Location
D02 Anson, Tanjong Pagar
Job Type
Full-time
Experience
Mid
Category
General
Salary
$8,500 - $17,000
Posted
3 days ago
Expires
Nov 15, 2025
Views
1

Job Details

Vacancies

1 position

Experience Required

No experience required

Job Description

About the Role

We are looking for a skilled Senior IC Designer to join our growing team. You will be responsible for driving the full digital circuit physical implementation flow (RTL to GDSII), focusing on performance, power, and area (PPA) optimization, signoff, and tape-out of advanced semiconductor products.


Key Responsibilities

  • Execute end-to-end physical implementation process of digital circuits (RTL to GDSII).
  • Utilize EDA tools such as Innovus, Fusion Compiler, PrimeTime, PrimePower, RedHawk and Calibre for design and verification.
  • Perform static timing analysis (STA), including constraint development and signoff.
  • Conduct synthesis using Design Compiler (DC) or Fusion Compiler (FC).
  • Plan and implement TOP-level place and route (PR), power integrity (PI), physical verification (PV), bump planning, and ESD protection strategies.
  • Handle signoff flows for advanced nodes, ensuring full compliance with foundry and customer requirements.
  • Contribute to successful tape-outs of large-scale, ultra-low voltage, or complex SoCs/IPs.
  • Apply low-power design methodologies and perform power analysis throughout the design flow.
  • Optimize PPA across implementation stages through analysis and tool flow tuning.

How you will stand out:

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 5+ years of experience in IC design.
  • Proficiency in using EDA tools for synthesis, place & route, timing, power, and DRC/LVS signoff.
  • Proven tape-out experience in advanced process nodes (e.g., 7nm, 5nm, or below).
  • Strong analytical skills and attention to detail.
  • Strong knowledge of low-power design techniques and methodologies (e.g., UPF).
  • Familiarity with advanced process signoff standards and manufacturing constraints.
  • Experience with system-level power planning and power grid analysis.
  • Background in handling full-chip integration and hierarchical designs.

What you will experience working with us:

  • A culture that values authenticity and diversity of thoughts and backgrounds;
  • An inclusive and respectable environment with open workspaces and an exciting start-up spirit;
  • A fast-growing company with the chance to network with industrial pioneers and enthusiasts;
  • Ability to contribute directly and make an impact on the future of the digital asset industry;
  • Involvement in new projects, developing processes/systems;
  • Personal accountability, autonomy, fast growth, and learning opportunities;
  • Attractive welfare benefits and developmental opportunities such as training and mentoring.

Desiwe is committed to providing equal employment opportunities by country, state, and local laws. Desiwe does not discriminate against employees or applicants based on conditions such as race, color, gender identity and/or expression, sexual orientation, marital and/or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union

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