We are seeking a highly skilled Senior Process Integration Engineer to lead the development and optimization of Indium Phosphide (InP) based Edge Emitting Lasers (EELs). In this role, you will be the bridge between design and manufacturing, ensuring that our high-performance optoelectronic devices transition from concept to high-volume production with world-class reliability and yield.

You’ll be working at the frontier of photonics, handling complex material systems and sophisticated fabrication sequences to power the next generation of optical communications and sensing technologies.

Core Responsibilities

• Process Flow Ownership: Design, implement, and manage the full end-to-end fabrication flow for InP-based EELs (e.g., Fabry-Pérot, DFB, and DBR lasers).
• Yield & Performance Optimization: Identify and resolve integration bottlenecks. Use Statistical Process Control (SPC) and Design of Experiments (DOE) to improve device electro-optical performance (threshold current, wall-plug efficiency, and slope efficiency).
• Cross-Functional Collaboration: Partner with Epitaxy (MOCVD) teams to optimize regrowth interfaces and with the Design team to ensure Layout-to-Mask integrity.
• Advanced Fabrication Management: Oversee critical steps including dry/wet etching (ICP/RIE), dielectric deposition (PECVD/ALD), metallization etc.
• Failure Analysis: Coordinate Root Cause Analysis (RCA) on fabrication failures using SEM, TEM, and FIB diagnostics to drive continuous improvement.

Key Technical Requirements

• Materials Expertise: Deep understanding of III-V compound semiconductors, specifically the GaAs/InP/InGaAsP/material systems.
• Device Physics: Strong grasp of semiconductor laser physics
• Fabrication Proficiency: Hands-on experience or good understanding on photolithography, etching, thin film
• Characterization:  Understanding laser characterization data and correlating results back to specific process modules.

Qualifications

• Education: PhD or Master’s degree in Electrical Engineering, Physics, Materials Science, or a related field.
• Experience: 5+ years of direct experience in III-V semiconductor processing
• Software: Proficiency in JMP, or Python for data analysis;
• Mindset: A methodical troubleshooter who thrives in a cleanroom environment and enjoys the "detective work" of process integration.