Principal Engineer, Frontend Central Product Integration Engineering (cPIE) Transformative HVB (high-value-bits)

Location
D25 Kranji, Woodgrove, Woodlands
Job Type
Full-time
Experience
Mid
Category
General
Salary
$8,000 - $15,000
Posted
1 week ago
Expires
Jul 7, 2026
Views
3

Job Details

Vacancies

1 position

Experience Required

No experience required

Job Description

Technical Leadership & Strategy

  • Set technical direction for CPIE initiatives in UE_ROW, quality indices, Frontend–PTS integration, and high‑value bits (PG2+) yield, aligned to business priorities and technology roadmaps.

  • Architect new data solutions, methodologies, and frameworks to:

    Identify and prioritize yield, quality, and reliability improvement opportunities across process, test, and design

    Model, monitor, and benchmark tool performance and process capability at scale

    Enable equipment prognostics and advanced process integration optimization

    Define test and screening optimization strategies that materially improve product grade yield without quality escape

  • Drive end‑to‑end problem solving on complex, cross‑module issues that cannot be addressed within a single function or site.

Cross‑Functional & Organizational Influence

  • Partner deeply with Process & Equipment Engineering, Manufacturing (MFG), Product Integration Engineering (PIE), and Data Science (DS) teams to:

  • Establish feasibility and technical soundness

  • Quantify business impact

  • Rapidly prototype and mature solutions

  • Act as a technical integrator across Global Quality (GQ), Product Engineering (PE), Central PEE (CPEE), Smart Manufacturing AI (SMAI), Technology Development (TD), and suppliers, ensuring solutions are scalable, manufacturable, and production‑ready.

  • Influence technical and strategic decisions beyond direct ownership, including across sites, nodes, and organizations.

Execution, Scale, and BKM Deployment

  • Lead the development, validation, and global deployment of BKMs, ensuring sustained performance and learning‑rate acceleration.

  • Balance long‑term architectural thinking with near‑term execution, driving measurable improvements in yield, quality, and cycle time.

  • Anticipate risks and tradeoffs (technical, schedule, cost, quality) and provide clear decision frameworks for leadership and stakeholders.

  • Support global engineering teams, including engagement across time zones and non‑standard hours when required.

Collaboration & Leadership Expectations

  • Function as a go‑to expert and mentor within CPIE and the broader FE engineering community.

  • Lead by influence rather than authority, enabling alignment across diverse technical disciplines.

  • Champion continuous improvement in systems, methods, tools, and skill sets to keep Micron best‑in‑class.

  • Demonstrate a strong growth mindset—continuously learning, unlearning, and evolving technical approaches.

Communication

  • Communicate complex technical concepts clearly and concisely to both technical and executive audiences.
  • Produce high‑quality written artifacts (technical proposals, design reviews, decision memos).
  • Represent CPIE effectively in cross‑org reviews and executive forums.
  • Willing to travel as needed to support global objectives.


Requirements & Technical Competency

  • PhD, Master’s, or Bachelor’s degree in Engineering or related discipline.

  • 8+ years of semiconductor industry experience, with deep exposure to product integration, process engineering, test solutions, product engineering, or circuit design.

  • Recognized depth in semiconductor manufacturing processes, equipment, and control systems.

  • Strong proficiency in data analysis and modeling tools (e.g., Y3, JMP, Python).

  • Demonstrated application of statistical methods and/or machine learning to real manufacturing problems.

  • Proven track record of technical leadership, decision‑making, multi‑tasking, and root‑cause resolution on ambiguous problems.

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