You are responsible to drive and manage the silicon Bump & package assembly suppliers, backend processes and solutions to achieve the aggressive TQRDCEB goals. You will work closely with package design & technology, test & product engg, production planning, quality engg & NPI teams, assembly/substrate suppliers to support new product & technology introduction activities by defining processes, monitoring systems, manage process improvements and changes. Provide day-to-day support to bump and assembly suppliers & internal planning, product and test engineering teams. Plan, drive & implement improvement activities for continual improvement, 2nd sourcing, cost reduction & customer satisfaction.

Qualifications:

–PhD / Master / Degree in Mechanical / Electrical / Electronics Engineering with 7~12 years of relevant experience of managing advanced node silicon bumping, large body single & multi-chip (2.1/2.5/3D) package assembly, substrate & back-end suppliers and processes.

–Hands on experience in Product Life-Cycle Management - creating & maintaining Bill of Material structure, Process Documentation, Process Change Notification etc.

–Good team player, result oriented individual, experienced in project management, failure analysis tools, techniques and TQM. Good analytical, problem-solving skills. Flexible and agile.

–Sound knowledge of applicable industry standards, quality systems, regulations, knowledge of prevailing and emerging silicon package & substrate technologies, bumping and assembly processes, materials and equipment.

–Able to communicate with internal team members & external partners in various geographic locations and may required to travel from time to time at short notice.

–Experienced AutoCAD user. Knowledge of silicon & PCB fabrication, board assembly processes, are an added advantage